Libav
cpu.c
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1 /*
2  * This file is part of Libav.
3  *
4  * Libav is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU Lesser General Public
6  * License as published by the Free Software Foundation; either
7  * version 2.1 of the License, or (at your option) any later version.
8  *
9  * Libav is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * Lesser General Public License for more details.
13  *
14  * You should have received a copy of the GNU Lesser General Public
15  * License along with Libav; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
17  */
18 
19 #include <stdint.h>
20 
21 #include "cpu.h"
22 #include "cpu_internal.h"
23 #include "config.h"
24 #include "opt.h"
25 #include "common.h"
26 
27 #if HAVE_SCHED_GETAFFINITY
28 #define _GNU_SOURCE
29 #include <sched.h>
30 #endif
31 #if HAVE_GETPROCESSAFFINITYMASK
32 #include <windows.h>
33 #endif
34 #if HAVE_SYSCTL
35 #if HAVE_SYS_PARAM_H
36 #include <sys/param.h>
37 #endif
38 #include <sys/types.h>
39 #include <sys/sysctl.h>
40 #endif
41 #if HAVE_SYSCONF
42 #include <unistd.h>
43 #endif
44 
45 static int cpuflags_mask = -1, checked;
46 
48 {
49  static int flags;
50 
51  if (checked)
52  return flags;
53 
54  if (ARCH_AARCH64)
55  flags = ff_get_cpu_flags_aarch64();
56  if (ARCH_ARM)
57  flags = ff_get_cpu_flags_arm();
58  if (ARCH_PPC)
59  flags = ff_get_cpu_flags_ppc();
60  if (ARCH_X86)
61  flags = ff_get_cpu_flags_x86();
62 
63  flags &= cpuflags_mask;
64  checked = 1;
65 
66  return flags;
67 }
68 
70 {
72  checked = 0;
73 }
74 
75 int av_parse_cpu_flags(const char *s)
76 {
77 #define CPUFLAG_MMXEXT (AV_CPU_FLAG_MMX | AV_CPU_FLAG_MMXEXT | AV_CPU_FLAG_CMOV)
78 #define CPUFLAG_3DNOW (AV_CPU_FLAG_3DNOW | AV_CPU_FLAG_MMX)
79 #define CPUFLAG_3DNOWEXT (AV_CPU_FLAG_3DNOWEXT | CPUFLAG_3DNOW)
80 #define CPUFLAG_SSE (AV_CPU_FLAG_SSE | CPUFLAG_MMXEXT)
81 #define CPUFLAG_SSE2 (AV_CPU_FLAG_SSE2 | CPUFLAG_SSE)
82 #define CPUFLAG_SSE2SLOW (AV_CPU_FLAG_SSE2SLOW | CPUFLAG_SSE2)
83 #define CPUFLAG_SSE3 (AV_CPU_FLAG_SSE3 | CPUFLAG_SSE2)
84 #define CPUFLAG_SSE3SLOW (AV_CPU_FLAG_SSE3SLOW | CPUFLAG_SSE3)
85 #define CPUFLAG_SSSE3 (AV_CPU_FLAG_SSSE3 | CPUFLAG_SSE3)
86 #define CPUFLAG_SSE4 (AV_CPU_FLAG_SSE4 | CPUFLAG_SSSE3)
87 #define CPUFLAG_SSE42 (AV_CPU_FLAG_SSE42 | CPUFLAG_SSE4)
88 #define CPUFLAG_AVX (AV_CPU_FLAG_AVX | CPUFLAG_SSE42)
89 #define CPUFLAG_XOP (AV_CPU_FLAG_XOP | CPUFLAG_AVX)
90 #define CPUFLAG_FMA4 (AV_CPU_FLAG_FMA4 | CPUFLAG_AVX)
91 #define CPUFLAG_AVX2 (AV_CPU_FLAG_AVX2 | CPUFLAG_AVX)
92  static const AVOption cpuflags_opts[] = {
93  { "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
94 #if ARCH_PPC
95  { "altivec" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ALTIVEC }, .unit = "flags" },
96 #elif ARCH_X86
97  { "mmx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
98  { "mmxext" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_MMXEXT }, .unit = "flags" },
99  { "sse" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE }, .unit = "flags" },
100  { "sse2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE2 }, .unit = "flags" },
101  { "sse2slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE2SLOW }, .unit = "flags" },
102  { "sse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE3 }, .unit = "flags" },
103  { "sse3slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE3SLOW }, .unit = "flags" },
104  { "ssse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSSE3 }, .unit = "flags" },
105  { "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM }, .unit = "flags" },
106  { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE4 }, .unit = "flags" },
107  { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE42 }, .unit = "flags" },
108  { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVX }, .unit = "flags" },
109  { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_XOP }, .unit = "flags" },
110  { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_FMA4 }, .unit = "flags" },
111  { "avx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVX2 }, .unit = "flags" },
112  { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOW }, .unit = "flags" },
113  { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOWEXT }, .unit = "flags" },
114  { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
115 #elif ARCH_ARM
116  { "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
117  { "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" },
118  { "armv6t2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6T2 }, .unit = "flags" },
119  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
120  { "vfpv3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3 }, .unit = "flags" },
121  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
122 #elif ARCH_AARCH64
123  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
124  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
125 #endif
126  { NULL },
127  };
128  static const AVClass class = {
129  .class_name = "cpuflags",
130  .item_name = av_default_item_name,
131  .option = cpuflags_opts,
132  .version = LIBAVUTIL_VERSION_INT,
133  };
134 
135  int flags = 0, ret;
136  const AVClass *pclass = &class;
137 
138  if ((ret = av_opt_eval_flags(&pclass, &cpuflags_opts[0], s, &flags)) < 0)
139  return ret;
140 
141  return flags & INT_MAX;
142 }
143 
144 int av_cpu_count(void)
145 {
146  int nb_cpus = 1;
147 #if HAVE_SCHED_GETAFFINITY && defined(CPU_COUNT)
148  cpu_set_t cpuset;
149 
150  CPU_ZERO(&cpuset);
151 
152  if (!sched_getaffinity(0, sizeof(cpuset), &cpuset))
153  nb_cpus = CPU_COUNT(&cpuset);
154 #elif HAVE_GETPROCESSAFFINITYMASK
155  DWORD_PTR proc_aff, sys_aff;
156  if (GetProcessAffinityMask(GetCurrentProcess(), &proc_aff, &sys_aff))
157  nb_cpus = av_popcount64(proc_aff);
158 #elif HAVE_SYSCTL && defined(HW_NCPU)
159  int mib[2] = { CTL_HW, HW_NCPU };
160  size_t len = sizeof(nb_cpus);
161 
162  if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
163  nb_cpus = 0;
164 #elif HAVE_SYSCONF && defined(_SC_NPROC_ONLN)
165  nb_cpus = sysconf(_SC_NPROC_ONLN);
166 #elif HAVE_SYSCONF && defined(_SC_NPROCESSORS_ONLN)
167  nb_cpus = sysconf(_SC_NPROCESSORS_ONLN);
168 #endif
169 
170  return nb_cpus;
171 }
172 
173 #ifdef TEST
174 
175 #include <stdio.h>
176 
177 static const struct {
178  int flag;
179  const char *name;
180 } cpu_flag_tab[] = {
181 #if ARCH_AARCH64
182  { AV_CPU_FLAG_NEON, "neon" },
183  { AV_CPU_FLAG_VFP, "vfp" },
184 #elif ARCH_ARM
185  { AV_CPU_FLAG_ARMV5TE, "armv5te" },
186  { AV_CPU_FLAG_ARMV6, "armv6" },
187  { AV_CPU_FLAG_ARMV6T2, "armv6t2" },
188  { AV_CPU_FLAG_VFP, "vfp" },
189  { AV_CPU_FLAG_VFPV3, "vfpv3" },
190  { AV_CPU_FLAG_NEON, "neon" },
191 #elif ARCH_PPC
192  { AV_CPU_FLAG_ALTIVEC, "altivec" },
193 #elif ARCH_X86
194  { AV_CPU_FLAG_MMX, "mmx" },
195  { AV_CPU_FLAG_MMXEXT, "mmxext" },
196  { AV_CPU_FLAG_SSE, "sse" },
197  { AV_CPU_FLAG_SSE2, "sse2" },
198  { AV_CPU_FLAG_SSE2SLOW, "sse2(slow)" },
199  { AV_CPU_FLAG_SSE3, "sse3" },
200  { AV_CPU_FLAG_SSE3SLOW, "sse3(slow)" },
201  { AV_CPU_FLAG_SSSE3, "ssse3" },
202  { AV_CPU_FLAG_ATOM, "atom" },
203  { AV_CPU_FLAG_SSE4, "sse4.1" },
204  { AV_CPU_FLAG_SSE42, "sse4.2" },
205  { AV_CPU_FLAG_AVX, "avx" },
206  { AV_CPU_FLAG_XOP, "xop" },
207  { AV_CPU_FLAG_FMA4, "fma4" },
208  { AV_CPU_FLAG_3DNOW, "3dnow" },
209  { AV_CPU_FLAG_3DNOWEXT, "3dnowext" },
210  { AV_CPU_FLAG_CMOV, "cmov" },
211  { AV_CPU_FLAG_AVX2, "avx2" },
212 #endif
213  { 0 }
214 };
215 
216 int main(void)
217 {
218  int cpu_flags = av_get_cpu_flags();
219  int i;
220 
221  printf("cpu_flags = 0x%08X\n", cpu_flags);
222  printf("cpu_flags =");
223  for (i = 0; cpu_flag_tab[i].flag; i++)
224  if (cpu_flags & cpu_flag_tab[i].flag)
225  printf(" %s", cpu_flag_tab[i].name);
226  printf("\n");
227 
228  return 0;
229 }
230 
231 #endif
#define CPUFLAG_3DNOW
#define AV_CPU_FLAG_AVX
AVX functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:47
#define AV_CPU_FLAG_ALTIVEC
standard
Definition: cpu.h:53
#define ARCH_ARM
Definition: config.h:14
AVOption.
Definition: opt.h:233
int av_cpu_count(void)
Definition: cpu.c:144
#define AV_CPU_FLAG_SSE
SSE functions.
Definition: cpu.h:35
#define CPUFLAG_SSE3
#define ARCH_X86
Definition: config.h:33
void av_set_cpu_flags_mask(int mask)
Set a mask on flags returned by av_get_cpu_flags().
Definition: cpu.c:69
#define CPUFLAG_SSE4
#define AV_CPU_FLAG_CMOV
i686 cmov
Definition: cpu.h:50
#define AV_CPU_FLAG_VFP
Definition: cpu.h:58
const char * class_name
The name of the class; usually it is the same name as the context structure type to which the AVClass...
Definition: log.h:38
static int checked
Definition: cpu.c:45
#define ARCH_AARCH64
Definition: config.h:12
AVOptions.
#define CPUFLAG_SSE3SLOW
#define AV_CPU_FLAG_NEON
Definition: cpu.h:60
#define AV_CPU_FLAG_MMXEXT
SSE integer functions or AMD MMX ext.
Definition: cpu.h:30
int ff_get_cpu_flags_ppc(void)
This function MAY rely on signal() or fork() in order to make sure AltiVec is present.
Definition: cpu.c:39
const char * name
int av_parse_cpu_flags(const char *s)
Parse CPU flags from a string.
Definition: cpu.c:75
#define AV_CPU_FLAG_ATOM
Atom processor, some SSSE3 instructions are slower.
Definition: cpu.h:44
static int flags
Definition: log.c:44
#define AV_CPU_FLAG_AVX2
AVX2 functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:51
#define AV_CPU_FLAG_SSE2SLOW
SSE2 supported, but usually not faster.
Definition: cpu.h:37
static int cpuflags_mask
Definition: cpu.c:45
#define AV_CPU_FLAG_XOP
Bulldozer XOP functions.
Definition: cpu.h:48
#define AV_CPU_FLAG_SSE42
Nehalem SSE4.2 functions.
Definition: cpu.h:46
#define AV_CPU_FLAG_SSSE3
Conroe SSSE3 functions.
Definition: cpu.h:43
static const uint16_t mask[17]
Definition: lzw.c:38
int av_opt_eval_flags(void *obj, const AVOption *o, const char *val, int *flags_out)
#define AV_CPU_FLAG_ARMV6T2
Definition: cpu.h:57
int main(int argc, char **argv)
Definition: avconv.c:2434
#define CPUFLAG_SSE
#define AV_CPU_FLAG_ARMV5TE
Definition: cpu.h:55
#define CPUFLAG_SSE2
#define AV_CPU_FLAG_SSE3
Prescott SSE3 functions.
Definition: cpu.h:40
int ff_get_cpu_flags_x86(void)
Definition: cpu.c:90
#define AV_CPU_FLAG_VFPV3
Definition: cpu.h:59
static int cpu_flags
Definition: dct-test.c:73
LIBAVUTIL_VERSION_INT
Definition: eval.c:55
#define AV_CPU_FLAG_3DNOW
AMD 3DNOW.
Definition: cpu.h:34
NULL
Definition: eval.c:55
#define AV_CPU_FLAG_ARMV6
Definition: cpu.h:56
int ff_get_cpu_flags_aarch64(void)
Definition: cpu.c:23
#define AV_CPU_FLAG_SSE3SLOW
SSE3 supported, but usually not faster.
Definition: cpu.h:41
#define CPUFLAG_FMA4
av_default_item_name
Definition: dnxhdenc.c:45
#define AV_CPU_FLAG_MMX
standard MMX
Definition: cpu.h:29
Describe the class of an AVClass context structure.
Definition: log.h:33
#define AV_CPU_FLAG_FMA4
Bulldozer FMA4 functions.
Definition: cpu.h:49
#define AV_CPU_FLAG_SSE4
Penryn SSE4.1 functions.
Definition: cpu.h:45
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
Definition: cpu.c:47
#define CPUFLAG_SSE2SLOW
#define CPUFLAG_XOP
#define ARCH_PPC
Definition: config.h:24
#define AV_CPU_FLAG_3DNOWEXT
AMD 3DNowExt.
Definition: cpu.h:39
common internal and external API header
#define CPUFLAG_AVX2
int len
int ff_get_cpu_flags_arm(void)
Definition: cpu.c:137
#define AV_CPU_FLAG_SSE2
PIV SSE2 functions.
Definition: cpu.h:36
#define CPUFLAG_3DNOWEXT
#define CPUFLAG_MMXEXT
#define CPUFLAG_AVX
#define CPUFLAG_SSE42
#define CPUFLAG_SSSE3